Radosław Pawlak
Avionics Integration Engineer · Avionics & Embedded Systems
Warsaw, Poland
Avionics Integration Engineer responsible for establishing and operating the system integration bench and HIL rigs. Builds and maintains test environments that simulate the full avionics network, enabling software teams to perform system-level testing before aircraft availability. Has broad expertise in avionics data bus protocols (ARINC 429, MIL-STD-1553) and real-time stimulation using dSPACE.
Expertise
- hardware-in-the-loop (HIL) rig integration
- avionics bench testing and verification
- ARINC 429 and MIL-STD-1553 bus analysis
- avionics system integration testing
- data bus timing and loading analysis
Technologies
Work History
2025-01
Python-based automated regression test framework for the avionics bench — automated 340 integration test cases that previously required manual execution. Test run time reduced from 3 days to 6 hours.
Challenge: Automating tests that previously relied on manual bus analysis tool observation required building a Python library for ARINC 429 packet capture and assertion. The Condor PCI-429 Python SDK had undocumented thread-safety issues that caused intermittent test failures when capturing on multiple channels simultaneously.
Learned: Hardware SDK thread-safety issues are a common but poorly documented problem. Always implement a thread-safety wrapper around hardware SDK calls and test concurrent access explicitly before building a multi-channel capture framework on top of it.
2024-03
Integration verification for the engine-aircraft interface — tested FADEC-to-avionics data communication over ARINC 429, verified engine thrust lever response timing, and confirmed N1/EGT parameter integrity end-to-end.
Challenge: N1 parameter had an unexpected 40ms latency on the ARINC 429 bus that was not in the ICD. Root cause: FADEC was filtering N1 with a 4-sample moving average at 10 Hz update rate, adding a 400ms lag at the filter output. The ICD had described the 'raw' update rate without mentioning the filter.
Learned: ICD parameter descriptions must explicitly state filtering and update rate policies. 'Update rate: 10 Hz' is ambiguous — it must specify whether filtered or unfiltered data is transmitted and what the filter characteristics are.
2023-10
ARINC 429 bus timing analysis for the avionics network — measured inter-word gap and bit-rate accuracy for 12 transmitting LRUs using a Condor PCI-429 analyzer. Identified 2 LRUs with timing non-conformances.
Challenge: One LRU was transmitting at 100.8kbps — 0.8% outside the ±1% ARINC 429 tolerance, but only at cold soak temperature (-55°C). The non-conformance was not detectable at room temperature. Required coordinating with the LRU supplier to replace the oscillator crystal.
Learned: ARINC 429 bus timing verification must be performed at temperature extremes, not just room temperature. Crystal oscillator frequency drift at cold soak is a well-known phenomenon but often overlooked in bench testing done at ambient conditions.
2023-04
HIL rig setup for flight control system integration testing — configured dSPACE DS1006 to simulate 32 sensor inputs (air data, inertial, radio altimeter) and 16 actuator position feedbacks in real time for FCS software verification.
Challenge: The dSPACE real-time model had a 1ms step size — too coarse to accurately simulate the high-frequency actuator dynamics that the FCS relied on for rate feedback. Required a multi-rate model structure with inner actuator loops at 0.25ms and outer FCS loops at 1ms.
Learned: HIL model step size must be chosen based on the highest frequency dynamics being simulated, not based on convenience. A 1ms step in a model with 400Hz actuator bandwidth aliases the dynamics and produces incorrect FCS test results.